Timing is an important feature in electronic circuits and systems. Digital computers rely upon clock signals to sequentially execute instructions. Digital computers and microprocessors use one or more clock signals to establish the time for each function including receiving data, sending data, and executing arithmetic and logical functions. It is an essential feature of digital computers and microprocessors that such functions be executed in a timed, sequential manner and so it is very important that such clock signals be stable.
Electronic components such as analog to digital converters also rely on a series of clock signals that are delayed a known time with respect to each other. Such A/D converters rely upon an initial clock signal to auto zero, a second clock signal delayed from the first signal to capture data, and the third clock signal delayed from the second clock signal to output the digital representation of the captured data.
Often electronic systems will require fixed or adjustable delay lines. See, for example, U.S. Pat. No. 5,252,867. There is described a programmable digital delay line that could be used as a part of the refresh circuitry of a dynamic random access memory (DRAM).
Mass storage memory devices such as compact disc memories, magnetic disc memories and magnetic drum memories may rely upon a combination of a clock and a delay line in order to read and to write data on the rotating memory storage medium. Each device divides its storage medium into cells. As the device rotates at a constant speed, the data in each cell can be thought of as stored in cells that are a known time delay with respect to the prior cell and the subsequent cell. As such, a constant delay line may be used to read data or write data into each cell.
In certain applications including secure communications it is desireable to reduce switching noise. Switching noise can be monitored and contains information about the data carried and switched by the circuit. One approach for reducing the digital switching noise has been developed by Allstot, Kiaei and Zele, "Analog Logic Techniques Steer Around the Noise," IEEE Journal of Circuits & Devices, pp 18-21, September 1993. That approach uses a current steering technique that draws constant current from Vdd. The current that is dumped on the Vss distribution will see a transient current that is device parameter limited as the input transitions to a logical "1." The Iss transient may be used to determine the current-steering logic elements state level.